In this lesson, you will learn,
- what is make
- how to build a makefile to trigger our code quality tools.
Within this lesson we are going to use the Make tool for manually triggering, and simplifying the process of running, the various code quality tools we have previously covered.
What is Make?
Make is a tool traditionally used by developers for the process of building and compiling software. Make executes a configuration file (called a Makefile), which contains various shell commands. These shell commands can be grouped and daisy-chained together, making it ideal for compiling software where multiple commands must be run in a certain order.
The Makefile contains 3 main components:
Let’s look at a Makefile example:
test: test.o anotherTest.o gcc -Wall test.c anotherTest.c -o test -I. test.o: test.c gcc -Wall -c test.c -I. anotherTest.o: anothertest.c gcc -Wall -c anotherTest.c -I.
Based on the example above, this Makefile allows us to compile our code by running
make test. This would run the test: target. This has 2 dependencies:
anotherTest.o. Therefore, Make would run these targets first, so that the required dependencies are created before running
Now, here’s the thing: outside of compiling and building software, Make is the perfect tool for running various shell commands without having to build our own shell scripts - which we will do now, in order to run our code quality tools.
Building our Makefile
First of all, let’s look at our Makefile (as shown below). The key points are:
- We provide a small helper at the beginning, which prints the available targets available to us. The helper is triggered by running
- We define each of our formatting and linting tools as targets.
@is used to suppress the printing of the shell command. Only the output of the shell command will be printed.
-is used to prevent Make from exiting if the command fails, based on a non-zero return code.